Project Description

AV 113 Phased-Array Radar-Receiver EW-ESM – MIMO.
The AV113 is part of ApisSys’ range of High Speed data conversion and signal processing solu¬tions based on the VITA 46, VPX standard.
The AV113 is fully compliant with OpenVPX standard, accommodating various communication protocols such as PCIe, SRIO, 1 Gbit and XAUI 10 Gbit Ethernet, as well as non OpenVPX adopted standard such as Aurora.
The AV113 combines eight 14-bit 1.25 Gsps ADCs with ultra-high processing power delivered by Xilinx® Virtex® 7 FPGA, making it ideally suited for fully synchronous multiple channels test and measurement, Electronic Warfare, Wideband Radar Receivers  .
The AV113 comes with complete software drivers for Windows and Linux. An FPGA Development Kit is provided including all necessary cores to build user FPGA application.